• Shuichi Sakai

    Project Professor, Institute for Future Initiatives
Profile
  • 1986
    D.E. from Course of Information Engineering, Graduate School of Engineering, The University of Tokyo
  • 1986
    researcher in Electrotechnical Laboratory
  • 1990
    senior researcher in Electrotechnical Laboratory
  • 1991-1992
    visiting scientist in Laboratory for Computer Science (LCS) , Massachusetts Institute of Technology (MIT) （fully guaranteed by MIT)
  • 1993-1996
    Chief, Massively Parallel Architecture Lab., Real World Computing Partnership
  • 1996
    Associate Professor in University of Tsukuba
  • 1998
    Associate Professor in School of Engineering , The University of Tokyo
  • 2001
    Professor in Graduate School of Information Science and Technology , The University of Tokyo
  • 2013
    Dean, Graduate School of Information Science and Technology
  • 2021
    Vice Presient, University Librarian, The University of Tokyo
  • 2024
    Professor Emeritus, Project Professor in Institute for Future Initiatives, The University of Tokyo

During this time, he was a director of the Institute of Electronics, Information and Communication Engineers (2015-2017), chairman of the Information and Systems Society (2016-2017), a director of the Information Processing Society of Japan (2006-2008), a member of the Science Council of Japan (2006.9-2020.8), and JSPS academic system research. Center researcher (2007-2010), JST CREST “Innovative computing technology supporting Society 5.0” area general manager (2018-), etc.

Field of Expertise

Information systems and their applications, especially computer systems, cyber security and HCI.

*He is also a well-known poet, the editor of the poetry magazine “Karin”, vice-chairman of The Kajins Association.

Papers

Representative Papers

  • Shuichi Sakai, Yoshinori Yamaguchi, Kei Hiraki, Yuetsu Kodama and Toshitsugu Yuba, An Architecture of a Dataflow Single Chip Processor, Proceedings of 15th International Symposium on Computer Architecture, pp.46-53 (1989).
  • Shuichi Sakai, Kei Hiraki, Yoshinori Yamaguchi, Yuetsu Kodama and Toshitsugu Yuba, Architectural Optimization of a Dataflow Computer、Journal of IPSJ, Vol.30, No.12, pp.1562-1572 (1989) (in Japanese) (received IPSJ Best Paper Award).
  • Shuichi Sakai, Yuetsu Kodama and Yoshinori Yamaguchi, Prototype Implementation of a Highly Parallel Dataflow Machine EM-4, Proceedings of 5th International Parallel Processing Symposium, pp.278-286 (1991).
  • Mitsuhisa Sato, Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi and Yasuhito Koumura, Thread-based Programming for the EM-4 Hybrid Dataflow Machine, Proceedings of 19th Annual International Symposium on Computer Architecture, pp.146-155 (1992).
  • Yuetsu Kodama, Hirofumi Sakane, Mitsuhisa Sato, Hayato Yamana, Shuichi Sakai and Yoshinori Yamaguchi, The EM-X Parallel Computer: Architecture and Basic Performance, Proc. of 22nd International Symposium on Computer Architecture, pp.14-23 (1995).
  • Shuichi Sakai, Masahiro Goshima and Hidetsugu Irie: Ultra Dependable Processor, IEICE Transactions on Electronics Vol. E91-C, No.9, pp.1386-1393, Sep. 2008.
  • Ryota Shioya, Kazuo Horio, Masahiro Goshima, and Shuichi Sakai: Register Cache System not for Latency Reduction Purpose, IEEE Int’l Symp. on Microarchitecture (MICRO-43), pp. 301—312 (2010). DOI: 10.1109/MICRO.2010.43
  • Hidetsugu Irie, Toru Koizumi, Akifumi Fukuda, Seiya Akakiy, Satoshi Nakae, Yutaro Bessho, Ryota Shioya, Takahiro Notsu, Katsuhiro Yoda, Teruo Ishihara, and Shuichi Sakai: STRAIGHT: Hazardless Processor Architecture Without Register Renaming, The 51st Annual IEEE/ACM International Symposium on Microarchitecture, pp.121-133 (Oct. 2018).
  • Toru Koizumi, Ryota Shioya, Shu Sugita, Taichi Amano, Yuya Degawa, Junichiro Kadomoto, Hidetsugu Irie, and Shuichi Sakai, Clockhands: Rename-free Instruction Set Architecture for Out-of-order Processors, 56th IEEE/ACM International Symposium on Microarchitecture (MICRO2023), Best Paper Nominate, Oct. 2023.　(MICRO2023 Best Paper Finalist)
  • Yuya Degawa, Toru Koizumi, Tomoki Nakamura, Ryota Shioya, Junichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai: A Principal Factor of Performance in Decoupled Front-End, IEICE Transactions on Information and Systems, vol. E106.D, no. 12, pp. 1960-1968, Dec., 2023. (received IEICE Best Paper Award)
Award (Computer Science)
  • Japan IBM Science Award (1991)
  • Ichimura Academic Award (1995)
  • IEEE Outstanding Paper Award (1995)
  • Okawa Publication Prize (2012)
  • IEICE Best Paper Award (2024)
  • IEICE Achievement Award (2018)
  • IEICE Fellow (2011)
  • IPSJ Best Paper Award (1991)
  • IPSJ Fellow (2010)
Award (Poem)
  • The Kajins Association Award (1987)
  • Shuji Terayama Award (2000)
  • Bokusui Wakayama Award (2007)
  • Japan Kajin-Club Criticism Award (2007)
  • Choukuu Award (2010)
  • Ono-city Poem Award(2015)
  • Tanka-Kenkyu Award (2024)